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VLSI Robotics ECE 545 Textbooks World of Integrated Circuits Which Way to Go? What is an FPGA Chip ? Field Programmable Gate Array A chip that can be configured by user to implement different digital hardware Configurable Logic Blocks and Programmable Switch Matrices Bitstream to configure: function of each block the interconnection between logic blocks CLB Structure CLB Slice LUT (Look-Up Table) Functionality Major FPGA Vendors SRAM-based FPGAs Xilinx, Inc. Altera Corp. Atmel Lattice Semiconductor Flash antifuse FPGAs Actel Corp. Quick Logic Corp. Xilinx FPGA Families Old families XC3000, XC4000, XC5200 old 0.5μm, 0.35μm and 0.25μm technology. Not recommended for modern designs. Low-cost families Spartan/XL – derived from XC4000 Spartan-II – derived from Virtex Spartan-IIE – derived from Virtex-E Spartan-3 High-performance families Virtex (0.22μm) Virtex-E, Virtex-EM (0.18μm) Virtex-II, Virtex-II PRO (0.13μm) Virtex-4 (0.09μm) Design process (1) Design process (2) Simulation Tools Many others… Synthesis Tools … and others Features of synthesis tools Interpret RTL code Produce synthesized circuit netlist in a standard EDIF format Give preliminary performance estimates Some can display circuit schematics corresponding to EDIF netlist Implementation After synthesis the entire implementation process is performed by FPGA vendor tools Top Level ASIC Digital Design Flow RTL Design Synthesis + Macro Development Place + Route Physical Verification Projects 1, 2Optimization Criteria Maximum ratio Throughput / Circuit Area or Minimum product Latency ? Circuit Area Project 2afrom FALL 2005to be modified in FALL 2006 Project 2a - Platform tools Target devices: standard-cell ASICs Libraries: 90 nm TCBN90G TSMC library 130 nm TCB013GHP TSMC library Tools: VHDL Simulation: Aldec Active HDL or ModelSim VHDL Synthesis: Synopsys Design Compiler Project 2bfrom FALL 2005to be modi