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Future of Strained Si/Semiconductors in Nanoscale MOSFETs Invited Paper S.E. Thompson, S. Suthram, Y. Sun, G. Sun, S. Parthasarathy, M. Chu, and T. Nishida Department of Electrical and Computer Engineering University of Florida, Gainesville FL 32611. contact: thompson@ece.ufl.edu Abstract— The maximum electron and hole mobility enhancement for uniaxial process-induced strained silicon is modeled and experimentally measured using a flexure based 4-point wafer bending jig. The highest known uniaxial stress to date is introduced into the channel of MOSFETs (applied mechanical stress of ∼1.0GPa on samples with initial process stress of 1GPa for a total channel stress of ∼2Pa). The maximum mobility enhancement from uniaxial stress is found to be greater than ∼4.0 and ∼1.7 times for holes and electrons, respectively. The physics behind the strain enhanced mobility is explained and future cases of technological importance to the industry are investigated. I. INTRODUCTION As we approach the limits of the planar MOSFET technology, the benefits from geometric scaling decrease and new techniques are required to improve transistor performance. The first technique widely Fig. 1. Four-point wafer bending jig used to introduce 1 GPa of mechanical used by the industry is engineering the inter-atomic distance of the stress. silicon lattice (i.e. strained Si) [1] [2] [3]. For the “right” type of strain, only 1% displacement of the Si lattice is needed to increase electron and hole mobility comparable to that found in alternate