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先进CMOS器件中polySi_TaN_HfSiON栅结构的干法刻蚀研究,干法刻蚀,干法刻蚀机,干法刻蚀设备,干法刻蚀工艺,干法深刻蚀工艺,硅干法刻蚀光刻胶,玻璃干法刻蚀,苏州太阳能干法刻蚀,干法蚀刻氮化硅
Vol. 32,No. 7 JournalofSemiconductors July2011
Dry etchingofpoly-Si/TaN/HfSiONgate stack foradvancedcomplementary
metal–oxide–semiconductordevices
Li Yongliang(李永亮) andXu Qiuxia(徐秋霞)
Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029,China
Abstract: A novel dry etching process of a poly-Si/TaN/HfSiON gate stack for advanced complementary
metal–oxide–semiconductor (CMOS) devices is investigated. Our strategy to process a poly-Si/TaN/HfSiON gate
stack is that each layer of gate stack is selectively etched with a vertical profile. First, a three-step plasma etching
process is developed to get a vertical poly-Si profile and a reliable etch-stop on a TaN metal gate. Then differ-
ent BCl -based plasmas are applied to etch the TaN metal gate and find that BCl /Cl /O /Ar plasma is a suit-
able choice to get a vertical TaN profile. Moreover, considering that Cl almost has no selectivity to Si substrate,
BCl /Ar plasma is applied to etch HfSiON dielectric to improve the selectivity to Si substrate after the TaN metal
gate is vertically etched off by the optimized BCl /Cl /O /Ar plasma. Finally, we have succeeded in etching a
poly-Si/TaN/HfSiONstack with a vertical profile and almost noSi loss utilizing these new etching technologies.
Keywords: TaNmetalgate; HfSiON high- ;plasmaetching; selectivity; integration
DOI: 10.1088/1674-4926/32/7/076001 EEACC: 2550N
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