第七章 向量处理.ppt

CVI gets used under mask 43 28 44 24 Why MPP? Best potential performance! Few successes Operator on vectors of registers Its easier to vectorize than parallelize Scales well: more hardware and slower clock rate Crazy research 39 40 41 42 T0 Vector Microprocessor (UCB/ICSI, 1995) Lane Vector register elements striped over lanes [0] [8] [16] [24] [1] [9] [17] [25] [2] [10] [18] [26] [3] [11] [19] [27] [4] [12] [20] [28] [5] [13] [21] [29] [6] [14] [22] [30] [7] [15] [23] [31] load Vector Instruction Parallelism Can overlap execution of multiple vector instructions example machine has 32 elemen