《数字电子技术_英文版_chapter05》.pptVIP

Chapter 5 Combinational Logic组合逻辑 5.1 Basic Combinational Circuits AND-OR AND-OR-Invert XOR XNOR NAND NOR 1 AND-OR Logic Example chip: 74HC58 74HC58 (CMOS): dual AND-OR 1 two inputs AND-OR. 1 three inputs AND-OR 2 AND-OR-Invert Logic An AND-OR-Invert can be used to implement POS expression. Example chip: 74LS51 74LS51 : dual 2-wide AND-OR-Invert 1 two inputs AND-OR-Invert. 1 three inputs AND-OR-Invert 3 Exclusive-OR (XOR)异或 4 Exclusive-NOR (XNOR)同或 5-2 IMPLEMENTING COMBINATIONAL LOGIC实现组合逻辑 From a Boolean Expression to a Logic Circuit Example: From a Boolean Expression to a Logic Circuit Example: From a Truth Table to a Logic Circuit Example: 5-3 THE UNIVERSAL PROPERTY OF NAND AND NOR GATES与非门和或非门的通用特征 The NAND Gate as a Universal Logic Element The NAND gate can be used to produce the NOT, AND, OR, and NOR operations. The NOR Gate as a Universal Logic Element The NOR gate can be used to produce the NOT, AND, OR, and NAND operations. 5-4 COMBINATIONAL LOGIC USING NAND AND NOR GATES使用与非门和或非门的组合逻辑 5 Combinational Logic Using NAND and NOR Gates NAND NOR NAND Logic NOR Logic 5-5 Logic Hazards Objective: Combinational logic hazards Reasons Checking Eliminating methods Static hazards Static hazards have two cases: Static 1 : an output variable should be a 1, but goes to 0 momentarily as a result of an input variable changing. Static 0 : an output variable should be a 0, but goes to 1 momentarily as a result of an input variable changing. Static 1 hazards example Static-0 hazards example Checking static hazards: If the circuit can be simplified as follows A+A=1 or AA=0, it has the potential to cause static hazards. Exercise exercise 5-6 OPERATION WITH PULSE WAVEFORMS具有脉冲波形的逻辑电路运算 Logical Operation is the Same The logical operation of a gate is the same for pulse inputs as for constant-level inputs. Homework Problems: 2 6d 9d 10c 12 22e 24g 27 Static-1 Static-0 * * * Logic circuit Combinational Logic circuit Sequential Logic circuit ANSI s