From Coherent States in Adjacent Graphene Layers toward Low-Power Logic Circuits.pdfVIP

Hindawi Publishing Corporation Advances in Condensed Matter Physics Volume 2011, Article ID 258731, 8 pages doi:10.1155/2011/258731 Research Article From Coherent States in Adjacent Graphene Layers toward Low-Power Logic Circuits Leonard F. Register, Dipanjan Basu, and Dharmendar Reddy Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, 10100 Burnet Road, Building 160, Austin, TX, 78758, USA Correspondence should be addressed to Leonard F. Register, register@ Received 31 May 2010; Accepted 19 August 2010 Academic Editor: Emanuel Tutuc Copyright © 2011 Leonard F. Register et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Colleagues and we recently proposed a new type of transistor, a Bilayer PseudoSpin Field Effect Transistor (BiSFET), based on many-body coherent states in coupled electron and hole layers in graphene. Here we review the basic BiSFET device concept and ongoing efforts to determine how such a device, which would be far from a drop-in replacement for MOSFETs in CMOS logic, could be used for low-power logic operation, and to model the effects of engineerable device parameters on the formation and gating of interlayer coherent state. 1. Introduction operation is a nonstarter. This need for continued scaling beyond the end of the roadmap for CMOS is motivating The greatest roadblock to continued logic scaling is power various efforts to produce transistors based on alternat