基于DSP+CPLD的三电平脉宽调制整流器脉冲发生方法.pdfVIP

第34 卷 第4 期 电 网 技 术 Vol. 34 No. 4 2010 年4 月 Power System Technology Apr. 2010 文章编号：1000-3673 （2010 ）04-0183-06 中图分类号：TM 461 文献标志码：A 学科代码：470·4031 基于DSP+CPLD 的三电平脉宽调制整流器 脉冲发生方法 伍文俊，段博，钟彦儒 （西安理工大学 自动化与信息工程学院，陕西省 西安市 710048 ） A Novel Pulse Generating Method for Three-Level Pulse Width Modulation Rectifier Based on Combination of Digital Signal Processor With Complex Programmable Logic Device WU Wen-jun, DUAN Bo, ZHONG Yan-ru (School of Automation and Information Engineering, Xi’an University of Technology, Xi’an 710048, Shaanxi Province, China) ABSTRACT: The pulse width modulation (PWM) strategy 0 引言 using symmetrical three-section voltage vectors for three-level PWM rectifier, in which the medium vectors are abandoned, is 二极管箝位三电平脉宽调制(pulse width analyzed. According to the characteristic of its control pulse, a modulation ，PWM)整流器具有开关器件承受电压 logical approach based novel pulse generation method, in 应力小、输出功率大、网侧电流谐波小、功率因 which the combination of digital signal processor (DSP) with 数高等特性，在风力发电[1-3] 、高压直流输电与无 complex programmable logic device (CPLD) is utilized, is [4-5] [6-7] [8] 功补偿 、中高压交流调速 、高速电机驱动 proposed. The DSP undertakes the task of sending out regional 等领域得到了广泛应用。然而，三电平PWM 整流 information and 6-channel basic pulses and by means of logical operation the CPLD assists DSP to generate 12-channel control 器直流侧中点电位的不平衡直接影响到整流器的工 pulses needed by three-level rectifier. Experimental results 作性能。因此，很多研究基于2 维平面坐标系，从 show that the proposed method is correct, simple and [9-12] [13]