WAT Introduction.pptVIP

1. MOSFET Transistor’s Naming WAT Parameter Naming Rule 2. MOSFET Capacitor WAT Parameter Naming Rule 3. Field Transistor 4. Junction Diode WAT Parameter Naming Rule 5. Sheet resistance WAT Parameter Naming Rule 6. Contact (via, stack via) resistance WAT Parameter Naming Rule 7. Poly metal continuity 8. Salicide Bridge WAT Parameter Naming Rule 9. Intra-Isolation 10. Inter-Isolation WAT Parameter Naming Rule 11. PIP, MIM and metal interconnect capacitors 12. Vertical Bipolar WAT Parameter Naming Rule 1. NMOS’s VTI Test Condition (use 10D13 as sample) Test VTI_N12_10_D13 Item: VD=0.1V, VS=VB=0V, VG=0V TO 0.8*1.2V MEASURE VTI_N=VG@ID = 0.1μA*(W/L) (W=10, L=0.13) VD =0.1V VS=VB=0V VG=0V to 0.8*1.2V(=0.96V) Detect ID VTI show the Threshold voltage in linear region. VTI Related In-Line Data: 1. Poly in-Line AEI CD 2. VT implant 3. AA in-Line AEI CD 4. Gate OX thickness/quality 5. LDD implant 6. S/D implant (N/P Plus) 7. Thermal budget Device Test Condition (Basic) VTI:线性区间，常数电流模式下的开启电压 2. NMOS’s IDSAT Test Condition (use 10D13 as sample) Test IDSAT_N12_10_D13 Item: VD=VG=1.2V, VS=VB=0V MEASURE IDSAT_N=ID/W VS=VB=0V VG=VD=1.2V Measure ID IDSAT show the Saturation current in work status. IDSAT Related In-Line Data: 1. Poly in-Line AEI CD 2. VT implant 3. AA in-Line AEI CD 4. Gate OX thickness/quality 5. LDD implant 6. S/D implant (N/P Plus) 7. Thermal budget Device Test Condition (Basic) IDSAT:饱和电流 3. NMOS’s IOFF Test Condition (use 10D13 as sample) Test IOFF_N12_10_D13 Item: VD=1.1*1.2V, VG=VS=VB=0V MEASURE IOFF_N=ID/W VG=VS=VB=0V Measure ID IOFF show the leakage current when device was OFF. IOFF Related In-Line Data: 1. S/D implant (N/P Plus) 2. Well implant 3. CT ETCH 4. Co-Loop 5. AA/STI structure 6. Small Defect 7. Thermal budget VD=1.