实验35 数集成电路的Verilog描述与仿真.docVIP

实验35 数字集成电路的Verilog描述与仿真 在集成电路设计过程中，数字集成电路占据相当大份额，。数字集成电路是“”、“数字集成电路设计”、“”和“集成电路制造技术”等理论课程的重要实践。锻炼和提高学生的数字集成电路与能力，强化学生理论联系实际和灵活应用所学知识的能力。module adder_test; reg a, b; initial begin; #5 a=0; b=0; #5 a=1; #5 b=1; #5 a=0; #5 a=1; #5 b=0; #5 a=0; end adder add1(a, b, sum, cout); endmodule module adder_test; reg a, b; initial begin; a=1; b=0; #5 a=1; #5 a=0; #5 a=1; #5 a=1; #5 a=0; end always #5 b=~b; adder add1(a, b, sum, cout); endmodule 二、实验内容 1. 图35.1为一个数字集成电路单元和输入激励波形，完成电路逻辑功能分析，采用行为描述完成电路功能描述，通过编写测试模块，完成模块仿真测试，验证分析结果； 图35.1 电路原理图输入激励波形 [1] 袁俊泉等编著，《数字设计》； 宋莫康等著，CMOS数字集成电路：分析与设计（第三版）电子工业出版社2005。 manufacturers drawings bolt fastened in the cylinder and outer cylinder. Cylinder cylinder in the drain pipe installation and measuring component leads. 6.4.4.3 blade carrier, partitions and lower installation check the sealing ring of the seal and springs, which shall conform to the technical requirements manufacturers drawings. Cylinder gasket on the mounting brackets supporting the Group assembled, the lugs shall be no Burr on the surface, and other debris. Department suite in place to measure surface and inner cylinder surface height difference, compared with the original values confirm the location. 6.4.4.4 lower bearing and thrust bearing installation clean bearing and bearing, thrust bearing joints, clean them with a thin layer of turbine oil, and then lifting it to bits. 6.4.4.5 high and middle pressure cylinder over it to the end (for high pressure rotor and low pressure change flange gasket without connection unit) rotors and rotor flange gasket connection and there is no connection, so the rotor in place cases, rotors in place must be high and middle pressure cylinder together with the Chamber over it to the end. Jack in the box that are installed on a push-pull device of adjusting the high and medium pressure cylinder to end over and around to set up indicators to monitor data, general data about the difference must not exceed 0.02mm. To pre