多处理器系统.ppt

Invalid: read = shared write = dirty shared looks the same Why write miss first? Because in general, only write a piece of block, may need to read it first so that can have a full vblock; therefore, need to get Write back is low priority event. * * * * * * Invalid: read = shared write = dirty shared looks the same Invalid: read = shared write = dirty shared looks the same * * * * * * * * * * * * UMA: Uniform Memory Access NUMA: Non_ Uniform Memory Access NORMA: NO Remote Memory Access PVP: Parallel Vector Processor SMP: Symmetrical Multiprocessor COMA: Cache-only Memory Access CC-NUMA: Cache-coherence NUMA NCC-NUMA: Non Cache-coherence NUMA SC-NUMA:software-coherent NUMA : T3E 480 MB/sec per link, 3 links per node memory on node switch based up to 2048 nodes $30M to $50M Processor b) Writes green, red stale c) Update memory (green), red stale in cache 较大的多处理器系统 Separate Memory per Processor Local or Remote access via memory controller 1 Cache Coherency solution: non-cached pages Alternative: directory per cache that tracks state of every block in every cache Which caches have a copies of block, dirty vs. clean, ... Info per memory block vs. per cache block? PLUS: In memory = simpler protocol (centralized/one location) MINUS: In memory = directory is f(memory size) vs. f(cache size) Prevent directory as bottleneck? distribute directory entries with memory, each keeping track of which Processor have copies of their blocks 分布目录多处理器系统 I/O系统 存储器 处理器+Cache 处理器+Cache 存储器 I/O系统 I/O系统 存储器 处理器+Cache I/O系统 存储器 处理器+Cache 处理器+Cache 存储器 I/O系统 处理器+Cache 存储器 I/O系统 互联网络 分布目录 分布目录 分布目录 分布目录 分布目录 分布目录 目录协议 Similar to Snoopy Protocol: Three states Shared: ≥ 1 processors have data, memory up-to-date Uncached (no processor has it; not valid in any cache) Exclusive: 1 processor (owner) has data;  memory out-of-date In addition to cache state, must track which processors have data when in the shared state (usually bit vector, 1 if processor has copy) Keep it simple(r): Writes t