Low Power - Deep Sleep Mode (PIC18 PIC24F).pptVIP

? 2006 Microchip Technology Inc. Deep Sleep Lowest-Power Sleep Mode Agenda Overview Implementation Family Roadmap Vocabulary RTCC – Real-Time Clock/Calendar DSWDT – Deep Sleep Watchdog Timer ULPWU – Ultra Low-Power Wake-Up DSBOR – Deep Sleep Brown-Out Reset What is Deep Sleep? Core, Peripherals and SRAM Powered-Off Lowest Power Mode: Deep Sleep as low as ~20 nA! Deep Sleep with RTCC as low as ~500 nA External Switches Not Required I/Os Remain Powered, Certain Peripherals Still Operable Battery Power Competitors’ products require extra battery or dedicated pins for RTCC RTCC can operate in Deep Sleep, powered by VDD Deep Sleep can run off of battery power for years! How is This Different Than Sleep? Consumes 90% Less Current! Context Saving Two Deep Sleep registers for context save will retain data Rest of SRAM data not retained Self-programmed FLASH or EEPROM could also be used Internal Core Voltage Regulator Shut Down Wake-Up Causes a Power-On Reset Execution resumes at the Reset vector Most SFRs reset to default values When to Use Deep Sleep? Great for applications that are inactive for long periods of time Remote Controls · Input Devices Sensors · Digital Thermometers Ideal for applications that require accurate timekeeping while consuming minimum power Sprinkler Timers Thermostats Watches Digital Clocks Agenda Overview Implementation Family Roadmap What Defines Low Power? What Defines Low Power? What Defines Low Power? What Defines Low Power? What Defines Low Power? What Defines Low Power? What Defines Low Power? What Can Remain Operating? RTCC Continues To Keep Time RTCC pin can output seconds clock I/O Pins Maintain State Special Deep Sleep Registers Retain Values (DSGPR0, DSGPR1, RTCC date/time) DSBOR Waking Up From Deep Sleep INT0 Deep Sleep Watchdog Timer RTCC Alarm Ultra Low-Power Wake-Up MCLR (power off / power on) Waking Up by INT0 INT0 Waking Up by DSWDT Deep Sleep Watchdog Timer (DSWDT) No external circuit required for int