《基于SOPC数字幅频均衡功率放大器设计与研究》.docVIP

基于SOPC 数字幅频均衡放大器 设计与研究 摘 要随着EDA、CPLD、SOPC等技术的推诚出新，新技术的应用迅速发展到国民生产的各个领域，加快了社会信息化程度的提高和社会生产力的发展。基于FPGA和FIR滤波器的可编程片上系统(SOPC)以其设计灵活性、可裁剪性、软硬件可编程性等优势，受到广大开发者的青睐。所以对基于SOPC技术的FIR滤波器的研究就有着重要的意义。 本文主要论述了前置放大、带阻网络、数字幅频均衡和低频功率放大电路各个部分的实现，并对SOPC技术在FIR中的实现方式进行了阐述。其主要内容如下： 对数字幅频均衡器及其FIR滤波器的理论进行了阐述，并对SOPC技术在FIR中的实现方式进行了阐述； 基于SOPC的系统硬件设计，包括以高精确度运放INA128和音频放大器NE5532为前置电路设计与测试、阻带网络的设计与测试，AD/DA转化的设计与分析，功率放大器的设计与测试； 应用DSP Builder技术对FIR进行了硬件设计，并给出了总体实现框图及该滤波器设计理论。最后将DSP硬件模块通过SOPC接口编辑成NIOS嵌入式系统处理器的用户指令，组成硬件加速器接口模块； 讨论了NIOS2软核机制，NIOS2 IDE中AD\DA的应用程序的开发. 本课题实现了数字均衡功率放大的目的，达到了输入信号与输出信号之间的误差在20Hz~20kHz的范围内为±1.5dB。 关键字：均衡器，SOPC，FIR滤波器，功率放大 ABSTRACTWith the development of the EDA、CPLD、SOPC and so on. The new technologies are penetrating into many fields promptly. And they improve the informationization level for the whole society. and drive the development of social productivity. The system on programmable chip based on FPGA and FIR filter is noticed by many designer because of its advantage and characteristic such as flexible、cuttable and software and hardware programmable, which favored by the majority of developers. therefore the research on system on programmable chip based on FIR filter has important significance. This article mainly discussed the preamplifier, band-stop networks, digital amplitude-frequency and low frequency power amplifier circuit balance the various parts of the implementation,and described SOPC technology in the realization of FIR in the manner.The main contents are as follows: Described the digital amplitude-frequency equalizer and FIR filter theory and SOPC technology in the realization of FIR in the way； The system hardware circuit design based on SOPC, including high-precision op-amp NE5532 for the INA128 and audio amplifier circuit design and pre-testing, stop-band network design and testing, AD/DA conversion of the design and analysis, power amplifier design and test； DSP Builder technology applications for the hardware design FIR and gives the block dia