外文翻译终稿1通信专业..docVIP

摘 要 随着大规模并行体系结构的兴起，正如一个通用处理器加上多核可编程加速器执行其建模仿真的需求不断增加。然而大多数国家仿真技术发展是极其缓慢的，并且对于全系统多核心架构模型的需求进一步增加了其复杂性。本文提出了一种快速，可扩展的并行仿真器，它采用了一种新的方法来加速使用GPU平台的多核协处理器。主要的想法是使用相关的结构，并把许多目标节点的仿真映射到高度并行GPU平台提供的众多硬件线程上。本文提出了一种新的方法来加速使用GPU平台的多核处理器并进行模拟。我们展示了使用异构系统（CPU和GPU）来模拟的多核异构平台的未来架构所面临的挑战，可行性和益处。我们所选取的目标架构包含成千上万个连接在一个简单有序核心的多核协处理器的ARM通用CPU上，是为了评估技术组成。这项工作提出使用在GPU上实行并行模拟加速优化技术。我们是这样区分CPU和GPU的，其中目标通用CPU模拟主机CPU上的全系统仿真，而多核协处理器是模拟了NVIDIA特斯拉M2070 GPU的平台。我们的实验展现出了当模拟50 MIPS的性能的整个异构芯片的时候和用多核处理器的高扩展性。 关键词：并行仿真 异构架构 多核处理器 加速器 GPGPU CUDA QEMU Abstract Emerging massively parallel architectures such as a general-purpose processor plus many-core programmable accelerators are creating an increasing demand for novel methods to perform their architectural simulation.Most state-of-the-art simulation technologies are exceedingly slow and the need to model full system many-core architectures adds further to the complexity issues. This paper presents a fast, scalable and parallel simulator, which uses a novel methodology to accelerate the simulation of a many-core coprocessor using GPU platforms. The main idea is to use，The target architecture ofthe associated . Simulation of many target nodes is mapped to the many hardware-threads available on highly parallel GPU platforms. This paper presents a novel methodology to accelerate the simulation of many-core coprocessors using GPUplatforms. We demonstrate the challenges,feasibility and benefits of our ideato use heterogeneous system (CPU and GPU) to simulate future architecture of many-core heterogeneous platforms. The target architecture selected to evaluate our methodology consists of an ARM general purpose CPU coupled with many-core coprocessor with thousands of simple in-order cores connected in a tile network. This work presents optimization techniques used to parallelize the simulation specificallyforacceleration on GPUs. We partition the full system s