Testing in the Fourth Dimension Texas AM University第四维的测试德克萨斯一和M大学.pptVIP

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Testing in the Fourth Dimension Texas AM University第四维的测试德克萨斯一和M大学.ppt

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Testing in the Fourth Dimension Texas AM University第四维的测试德克萨斯一和M大学

Jan. 25, 2001 VLSI Test: Bushnell-Agrawal/Lecture 2 Lecture 2VLSI Testing Process and Equipment Motivation Types of Testing Test Specifications and Plan Test Programming Test Data Analysis Automatic Test Equipment Parametric Testing Summary Motivation Need to understand some Automatic Test Equipment (ATE) technology Influences what tests are possible Serious analog measurement limitations at high digital frequency or in the analog domain Need to understand capabilities for digital logic, memory, and analog test in System-on-a-Chip (SOC) technology Need to understand parametric testing Used to take setup, hold time measurements Use to compute VIL , VIH , VOL , VOH , tr , tf , td , IOL, IOH , IIL, IIH Types of Testing Verification testing, characterization testing, or design debug Verifies correctness of design and of test procedure – usually requires correction to design Manufacturing testing Factory testing of all manufactured chips for parametric faults and for random defects Acceptance testing (incoming inspection) User (customer) tests purchased parts to ensure quality Testing Principle Automatic Test Equipment Components Consists of: Powerful computer Powerful 32-bit Digital Signal Processor (DSP) for analog testing Test Program (written in high-level language) running on the computer Probe Head (actually touches the bare or packaged chip to perform fault detection experiments) Probe Card or Membrane Probe (contains electronics to measure signals on chip pin or pad) Verification Testing Ferociously expensive May comprise: Scanning Electron Microscope tests Bright-Lite detection of defects Electron beam testing Artificial intelligence (expert system) methods Repeated functional tests Characterization Test Worst-case test Choose test that passes/fails chips Select statistically significant sample of chips Repeat test for every combination of 2+ environmental variables Plot results in Shmoo plot Diagnose and correct design errors Continue throughout production li