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Automatic Modeling of Fault Tree for NuIEEE Transactions on Power Electronics,Clear Power Safety IC Configuration.docVIP

Automatic Modeling of Fault Tree for NuIEEE Transactions on Power Electronics,Clear Power Safety IC Configuration.doc

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AutomaticModelingofFaultTreeforNuIEEETransactionsonPowerElectronics,ClearPowerSafetyI

Energy and Power Engineering, 2013, 5, 269-273 doi:10.4236/epe.2013.54B052 Published Online July 2013 (/journal/epe) Automatic Modeling of Fault Tree for NuIEEE Transactions on Power Electronics,Clear Power Safety IC Configuration Shan Leng , Bo Zhang , Wei Sun , Zhiwu Guo , Yichen Hao 1 1 2 2 1 1 School of Energy and Environment, Southeast University, Nanjing, China 2 Instrumentation and Control Institute, Guangdong Nuclear Power Engineering Corp. Shenzhen, China Email: zb126.com Received April, 2013 ABSTRACT The automatic modeling of fault tree for nuclear power safety IC configuration is designed to meet the requirements of reducing the workload and improving the traceability during the nuclear power safety IC system reliability assess- ment work. To complete the fault tree automatic modeling, the Visio Automation software technology is used to ana- lyze the topology of the nuclear power safety IC system hardware device and software function. The good result in practical implementations shows that the nuclear power safety IC system fault tree modeling work is successfully simplified. Keywords: Nuclear Power Safety IC System; Visio Automation; Automatic Modeling 1. Introduction nuclear power safety IC system fault tree modeling work is successfully simplified. This paper takes nuclear power safety Instrumentation and Control system, or IC system for short, as the mod- eling object. Safety IC system, a crucial part of the nu- clear power plant, guarantees safety, reliability and eco- nomic efficiency. Considering the distinctive features of nuclear power plant, safety and reliability of all nuclear power systems must be verified with no exception of the very important nuclear power safety IC system. In or- dinary verification modeling process, fault trees are built manually aft

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