COA课件Ch05.ppt

William Stallings Computer Organization and Architecture6th Edition Chapter 5 Internal Memory §5.1 Semiconductor Main Memory Basic element——Memory cell 存储元 Share properties 共性 —binary 0 or 1 —two states: stable(e.g. SRAM) or semistable(e.g.DRAM) —write into cell at least once （至少一次） —read out from cell repeatedly（重复） Semiconductor Memory Types Dynamic RAM Bits stored as charge in capacitors 利用电容能存储电荷 Charges leak （电容漏电，电荷损失） Need refreshing even when powered Simpler construction 结构简单 Smaller per bit Less expensive 成本低 Need refresh circuits （刷新） Slower 速度慢 Main memory Essentially analogue Level of charge determines value Dynamic RAM Structure DRAM Operation Address line active when bit read or written Transistor switch closed (current flows) Write —Voltage to bit line High for 1 low for 0 Then signal address line Transfers charge to capacitor Read Address line selected transistor turns on Charge from capacitor fed via bit line to a sense amplifier Compares with reference value to determine 0 or 1 Capacitor charge must be restored Recharge 再充电 Static RAM Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction 结构复杂 Larger per bit More expensive 昂贵 Does not need refresh circuits Faster 快 Cache Digital Uses flip-flops Static RAM Structure Static RAM Operation Transistor arrangement gives stable logic state State 1 C1 high, C2 low T1 T4 off, T2 T3 on State 0 C1 low, C2 high T1 T4 on, T2 T3 off Address line transistors T5 T6 is switch（开关） Write – apply value to B compliment to B Read – value is on line B SRAM v DRAM 比较 Both volatile Power needed to preserve data Dynamic cell Simpler to build, smaller(more cell per unit area) More dense （密度高） Less expensive 便宜 Needs refresh （刷新） Larger memory units 大规模主存储器 Static Faster 快速 SRAM for Cache memory,DRAM for main memory Read Only Memory (ROM) Permanent storage 永久存储 Nonvolatile 非易失 Microprogramming (see later)微程序设计 17章 Library subroutines 常用功