Token flow control：（标记流控制）.pdfVIP

Token Flow Control Amit Kumar, Li-Shiuan Peh and Niraj K. Jha Department of Electrical Engineering Princeton University, Princeton, NJ 08544 Email: {amitk, peh, jha}@princeton.edu Abstract before having to go through a complete router pipeline at every As companies move towards many-core chips, an efficient on- intermediate hop along their path. As a result, communication chip communication fabric to connect these cores assumes crit- energy/delay in such networks is dominated by the router ical importance. To address limitations to wire delay scalability overhead, in contrast to an ideal network where packet latency and increasing bandwidth demands, state-of-the-art on-chip networks use a modular packet-switched design with routers and energy are solely due to the wires between the source and at every hop which allow sharing of network channels over destination. For instance, routers consume around 61% of the multiple packet flows. This, however, leads to packets going average network power in the MIT Raw chip as opposed to 39% through a complex router pipeline at every hop, resulting in consumed by the links [5]. Similarly, the Intel 80-core teraflops the overall communication energy/delay being dominated by the router overhead, as opposed to just wire energy/delay. chip has router power taking 83% of network power versus 17% In this work, we propose token flow control (TFC), a flow consumed by the links [3]. The large energy-delay-throughput control