COA课件10概要1.pptVIP

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  • 2017-07-02 发布于湖北
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COA课件10概要1

William Stallings Computer Organization and Architecture 6th Edition Chapter 10 Instruction Sets: 指令集 Characteristics and Functions §10.1 machine instruction characteristics Instruction set --The complete collection of instructions that are understood by a CPU Machine Code Binary Usually represented by assembly codes 1.Elements(组成要素) of an Instruction Operation code (Op code) 操作码 What to do Source Operand reference 源操作数的信息 From where Result Operand reference目标操作数的信息 To where Next Instruction Reference下一条指令的信息 Where to fetch 2.Where source result Operands? Main memory (or virtual memory) CPU register Immediate I/O device 3.Instruction Representation In machine code each instruction has a unique bit pattern For human, a symbolic representation is used 用符号表示 e.g. ADD, SUB, LOAD Operands can also be represented in this way ADD A,B (A and B are symbolic address) Simple Instruction Format 4.Instruction Types Data processing —Arithmetic and logic instructions Data storage (main memory) —Memory instructions Data movement (I/O) —I/O instructions Program flow control —Test and branch instructions 5.Number of Addresses (a) 4 addresses: Operand1, Operand2, Result, Address(next instruction) Be extremely rare, because of PC. 3 addresses Operand 1, Operand 2, Result a ? b + c;(a,b and c are symbolic address) May be a forth - next instruction (usually implicit) Not common Needs very long words to hold everything —e.g.Length of address=16 bits —Need 16 x 3=48 bits for operand address Example(1) Turn to page 335(354) Y=(A-B) ?(C+D x E) Three-address instructions —SUB Y, A, B; Y?A-B —MPY T, D, E; T?D x E —ADD T, T, C; T?T+C —DIV Y, Y, T; Y?Y ? T Total:four instructions Number of Addresses (b) 2 addresses One address doubles as operand and result a = a + b Reduces length of instruction Requires some extra work Temporary storage to hold some results Example(2) Turn to page 335(354) Y=(

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