纳米时代的集成电路.pptx

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纳米时代的集成电路

Dr. ShaoJun WEI, Professor Director, Institute of Microelectronics Tsinghua University, PRC October 12, 2010;;A Game of Calculation?;Binary and Digital System;Amplifier and Binary Code;Vacuum Tube;ENIAC: 1st Electronics Computer;Transistor;Principle of Semiconductor Transistor;Integrated Circuits ;;Integrated Circuits Exist Everywhere;;Introduction;Golden Moore;Factor One: Scaling-down;Robert Dennard and Dennard’s Law;Factor One: Scaling-down;;;;Power Consumption is key;;Factor One: Scaling-down;ENIAC: Application Specific Computer;The Von Neumann architecture is a design model for a stored-program digital computer that uses a central processing unit (CPU) and a single separate storage structure (memory) to hold both instructions and data. Characteristics of the Von Neumann’s architecture: a) memory; b) control unit; c) arithmetic logic unit; d) input / output interface. The disadvantage of Von Neumann architecture: shared memory for instructions and data with one data bus and one address bus between processor and memory. Instructions and data have to be fetched in sequential order (known as the Von Neumann Bottleneck), limiting the operation bandwidth.;Factor Two: Computation;Various Architecture; 60年前,硬件很贵 复用资源是必须的;;;Economy: Heavy Investment;Cost Per Transistor Reduction;;Only a few high-end chip makers today can even afford the exorbitant cost of NEXT-GENERATION RESEARCH AND DESIGN, much less the fabs to build them. 将来只有少数高端芯片设计公司可以负担昂贵的研发费用,而更少的公司有能力制造新一代的产品。 R. Colin Johnson, “IBM Fellow: Moore’s Law Defunct,” EE Times, 4/07/09;Scaling-down Von Neumann ISA;More Moore and More Than Moore;Physical Limits: Power dissipation limits: “Device-at-the-physical-limit” will dissipate several thousand Watts/square-cm Technological Limits: Pushing CMOS to its ultimate limits requires revolutionary materials and device innovations that have significant scientific and engineering barriers Economic Limits: Implementing all the technology innovations may raise manufac

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