一种高效的JPEG2000位平面编码器设计.pdfVIP

39 2 西 安 交 通 大 学 学 报 Vol. 39 l 2 2005 2 JOU RNAL OF XIcAN JIAOT ON G U NIVERSITY Feb . 2005 J PEG2000 王 勇, 郑南宁, 梅魁志, 朱悦心, 刘跃虎 ( , 710049, : 针对JPEG2000 芯片实现时的硬件 杂性和编码效率低的问题, 通过分析编码所需状态变量的产生 机制, 得到了一种最高有效位( M SB 检测电路, 它能使状态变量实时产生. 同时, 在3 个通道编码时引入列 快速扫描电路, 它在清除通道编码中设计了游程编码和0 编码的流水实现电路, 最后得到了位平面编码器0 冗余时钟设计. 将此方法用于实现三通道并行的位平面编码器时, 相对于单通道的跳点跳列, 其运算速度可 提高2 倍, 逻辑电路节约50% , 而对于64 @64 像素的码块, 存储器节约20 kb . : 位平面编码; 通道并行编码; 最高有效位检测; 列快速扫描 : TN402 : A : 0253O987X( 2005 02O0 158O04 Design of High Eff icient JP EG2000 Bit2P lane Encoder Wang Yong, Zheng Nanning, Mei Kuizhi, Zhu Yuexin, Liu Yuehu ( In st itu t e of Art ificial Int el ligen ce and R obot ics, Xican J iaot ong University, Xic an 710049, China Abstr act : F ocusing on the pr oblem that the har dware complexity and low encoding efficiency exist in JPEG2000 chip implem ent ation , a most significant bit ( M SB det ect ion circuit was obt ained through analy2 zing of generation mechanism of st at e var iables, which can generate stat e variables in r eal t ime when the dat a is accessed from the code block memor y. Meanwhile a column scan circuit was put int o the three pass encoder, and a pipeline sequence generation circuit for run length coding and zero coding was designed in the clean2up p ass coding. Finally, a bit2plane encoder with zero redundancy clock was implement ed. When the method is u sed for implem ent ing threeOp ass p ar allel bit2plane encoding, the op erat ion sp eed is increased two t imes compared with the encoder realized by pixel skip and GOCS( group of column skip the logic re2 sources is saved about 50% , and the memory is saved about 20 kb for the size of the code block 64 @64. Keywor ds: bit2planeencode; passparallelism encode; mos