微处理器从系统总线上读取数据.pptVIP

Computer English Chapter 2 Organization of Computers 2.4 I/O Subsystem Organization and Interfacing The load logic plays the role of the enable logic in the input device interface. When this logic receives the correct address and control signals, it asserts the LD signal of the register, causing it to read data from the systems data bus. The output device can then read the data from the register at its leisure while the CPU performs other tasks. 装载逻辑发挥着输入设备接口中使能逻辑的作用。当此逻辑获得正确的地址信号和控制信号后，它发出寄存器的LD信号，促使它从系统数据总线上读取数据。然后输出设备可以在其空闲的时候从寄存器中读取该数据，同时CPU可以执行其他的任务。 2.4 I/O Subsystem Organization an