单片机定时器及中断的使用(含原创完整精讲例程)(Single-chip microcomputer timer and interruptible use (including original and complete intensive routine)).docVIP
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单片机定时器及中断的使用(含原创完整精讲例程)(Single-chip microcomputer timer and interruptible use (including original and complete intensive routine))
单片机定时器及中断的使用(含原创完整精讲例程)(Single-chip microcomputer timer and interruptible use (including original and complete intensive routine))
STC89C52 timer/counter USES one, register 1. Data register
TLx [1]
THx 8 ch dh not addressing clear 0 reset
Eight registers high 8 bits of preserving count value.
When the working principle of count from TL began to add 1 count meter to TH carry until after the expiration of the TH overflow TF label
Chi CPU interrupt processing and then apply for interrupt.
2. The pattern choice TMOD register 89 h not clear 0 addressing reset
Four is used to control the timer 1 high low 4 is used to control the timer 0
GATE - GATE control
= 0 TC [2] the start-stop only controlled by the registers the TRx in TCON
= 1 TC rev. Stop by the level of external interrupt pin and the TRx in TCON common control.
C/T - mode selection
= 0 timer to internal machine cycle count [3]
= 1 counter external input count by Tx [4] pin input
Note counting mode from sampling to count update need 2 machine cycle, a total of 24 clock cycles accordingly
Clock frequency of f MHz supreme count of 1/2 f MHz frequency.
M1M0 - method of job selection
0 = 00 way 13 TH all use TL low five
1 = 01 way 16 TH TL use
2 = 10 way eight heavy load automatically timer when overflow will TH deposit the value of the heavily into the TL automatically
11 = 3 applies only to T0 way. The timer 0 is used as the double 8 bit TC. TL0 as an 8-bit TC
Control of the standard timer 0 control. TH0 only as an 8-bit timer is controlled by a timer 1 of a control
System. T1 stop counting.
Note in mode 2 overflow after the CPU will automatically count the THx the values into TLx. Therefore in timer
Before the start of in THx and TLx loaded initial value must be the same to ensure the accuracy of the count.
3. Control register TCON an addressable 88 h reset 0
A symbol
TF1 TR1 TF0 TR0 IE
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