Challenges Facing 65 nm Particle Metrology and （65纳米粒子计量和面临的挑战）.pdf

SECTION 6 FUTURE FAB International Issue 14 - WAFER PROCESSING Challenges Facing 65 nm Particle Metrology and Process Performance to Meet ITRS Requirements Introduction Metrology of Particles at The International Technology Roadmap for sub-100 nm Dimensions Semiconductors (ITRS) surface preparation Light scattering has been used for many years requirements for sub-100 nm technology as a primary method of defect detection on nodes call for particle sizes of 65 nm and 50 both patterned and unpatterned wafers nm at demanding defect densities[1]. The because both a wafer surface and any defects ability to achieve these ambitious surface present on the surface can be productively preparation goals hinges on developments analyzed by means of the light they scatter. in metrology, silicon materials, and wafer Since it is possible to discriminate between cleaning areas. sources of scattered light based on their A variety of factors hinder metrology respective effects on light scatter, detection of small particles and other defects on may be optimized and limited to