power device课件.pptVIP

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  • 约1.24千字
  • 约 65页
  • 2017-08-16 发布于河南
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power device课件

Power MOSFET design and technology;? Power devices : application fields ? Power MOS : structure and technology ? Technological Road-map HV and LV devices ;APPLICATION FIELDS OF POWER DEVICES;APPLICATION FIELDS FOR POWER DEVICES ;Frequency [Hz];POWER MOSFET STRUCTURE AND TECHNOLOGY;X ~ 600 mm;N+;N+;N+;N+;N+;N+;P+;Body (Boron) ionic implant Body diffusion;Source (As,P) ionic implant;Channel making (3);Contacts photolithography (mask and etch);Passivation;Back finishing process steps;Passivation (Nitride);N++;N++;3D PMOS structure ;PMOS layout (STW15NB50);PMOS : 2D simulation result in a single strip; PARASITIC ELEMENTS INSIDE POWERMOS STRUCTURE;D;D;G;G;D;POWER MOS CURRENT CAPABILITY;G;G;VGS VTH VDS 0;VDS [V];Drain current Vs Gate voltage;VDS [V];The PMOS structure has parasitic bipolar element inside.;Power MOS : OUTPUT resistance analysis (RDSon);D;Repy;Repy;Lc;Rc = ;Racc = ;Rj-fet = f( ) ;In the Low Voltage Power MOS (BVdss ≤100 V) You can decrease the Rdson with: strip high density VLSI process;BVDSS [ V ];Low Voltage PMOS: the VLSI technology;;;Power MOSFET SWITCHING;In a Power MOSFET, the switching time depends on:;RG;R’G;R”G;G;PARASITIC CAPACITORS (INSIDE THE STRUCTURE);D;G;G;G;G

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