a new high-performance digital fm modulator and demodulator for software-defined radio and its fpga implementation一个新的高性能数字调频调制器和解调器软件定义无线电及其fpga实现.pdfVIP

Hindawi Publishing Corporation International Journal of Reconfigurable Computing Volume 2011, Article ID 342532, 10 pages doi:10.1155/2011/342532 Research Article A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation Indranil Hatai and Indrajit Chakrabarti Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur 721302, India Correspondence should be addressed to Indranil Hatai, indranil.hatai@ Received 31 March 2011; Accepted 8 September 2011 Academic Editor: Scott Hauck Copyright © 2011 I. Hatai and I. Chakrabarti. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. This paper deals with an FPGA implementation of a high performance FM modulator and demodulator for software defined radio (SDR) system. The individual component of proposed FM modulator and demodulator has been optimized in such a way that the overall design consists of a high-speed, area optimized and low-power features. The modulator and demodulator contain an optimized direct digital frequency synthesizer (DDFS) based on quarter-wave symmetry technique for generating the carrier frequency with spurious free dynamic range (SFDR) of more than 64 dB. The FM modulator uses pipelined version of the DDFS to support the up conversion in the digital domain. The proposed FM modulator and demodulator has been implemented and tested using XC2VP30-7ff896 FPGA as a target device and can operate at a maximum frequency of 334.5 MHz and 131 MHz involving around 1.93 K and 6.4 K equivalent gates for FM modulator and FM demodulator respectively. After applying a 10