硬件描算语言chapter4.ppt

* 例4.3-3：阻塞赋值语句和非阻塞赋值语句对比例程 （1）阻塞赋值语句 module block(a, b, c, clk, sel, out); input a, b, c, clk, sel; output out; reg out, temp; always @(posedge clk) begin temp = ab; if (sel) out = temp|c; else out = c; end endmodule （2）非阻塞赋值语句 module non_block(a, b, c, clk, sel, out); input a, b, c, clk, sel; output out; reg out, temp; always @(posedge clk) begin temp = ab; if (sel) out = temp|c; else out = c; end endmodule 4.4 条件分支语句 * 4.4.1 if条件分支语句 形式1： if(条件表达式)语句块; 形式2： if(条件表达式) 语句块1; else 语句块2; 形式3： if(条件表达式1) 语句块1; else if 语句块2; . . . else if(条件表达式i) 语句块i; else 语句块n; * * Microelectronics School Xidian University 例4.4-1：if-else使用例程（1） module mux2_1(a,b,sel,out); input a,b,sel; output out; reg out; always@(a,b,sel) begin if(sel) out=a; else out=b; end endmodule 4.4.2 case条件分支语句 * * Microelectronics School Xidian University case(控制表达式) 值1: 语句块1; 值2: 语句块2; . . . 值n: 语句块n; default: 语句块n+1; endcase 表4.4-1 case分支语句的真值表 case 0 1 x z 0 1 0 0 0 1 0 1 0 0 x 0 0 1 0 z 0 0 0 1 module non_latch_case(a,b,sel,out); input a,b; input [1:0]sel; output out; reg out; always@(a,b,sel) case(sel) 2’b00:out=a; 2’b01:out=a; 2’b10:out=b; 2’b11:out=b; default:out=0; endcase endmodule module non_latch_case(a,b,sel,out); input a,b; input [1:0]sel; output out; reg out; always@(a,b,sel) case(sel) 2’b00: 2’b01:out=a; 2’b10: 2’b11:out=b; default:out=0; endcase endmodule * * Microelectronics School Xidian University 例4.4-5：用case语句描述BCD数码管译码 module BCD_decoder(in, out); input [3:0] in; output [6:0] out; reg [6:0] out; always @(in) begin case(in)