Status and Challenges for NonVolatile Spin （对非易失性的自旋状态和挑战）.pdfVIP

Status and Challenges for Non-Volatile Spin-Transfer Torque RAM (STT-RAM) Mohamad T. Krounbi S. Watts, D. Apalkov, X. Tang, K. Moon V. Nikitin , A. Ong, V. Nikitin, E. Chen Grandis, Inc. International Symposium on Advanced Gate Stack Technology Albany, NY September 29 – October 1 , 2010 © 2010 Grandis Corporation 9/23/2010 1 Outline • Grandis Corporation Overview • STT-RAM Status – MTJ Write Current Density – STT-RAM Thermal Stability – STT-RAM Scalability – Test Chip results • Latest Advances in write current performance • Dual MTJ Design • Partial perpendicular Anisotropy • Conclusions *STT-RAM: Spin Transfer Torque Random Access Memory © 2010 Grandis Corporation 9/23/2010 2 Grandis Corporation Update • Joint Development Program with Hynix Semiconductor moving ahead fast – Hynix has large team working on STT-RAM, expect fully-functional STT-RAM chips this year – Major paper on high-density STT-RAM chip operation accepted for presentation at IEDM 2010 • Significant progress in MTJ development since last year – 2x reduction in write current, 30% stability improvement, 10-20% TMR improvement – In-plane STT-RAM shows clear, scalable path to below 20 nm technology • Met Phase I targets on $15M DARPA contract six months ahead of schedule – Demonstrated 0.25 pJ MTJ write energy, $8.6M Phase II begins in September 2010 • Presented key papers at VLSI Symposium, IEEE IMW other major conferences – Covered latest advances in MTJ materials, scalability of in-plane STT-RAM technology, read disturb and writ