ldpc与turbo解码器中的专用控制器设计 design of application specific control processor for ldpc and turbo decoder.pdfVIP

40 7 2014 7 Vol.40 No.7 Computer Engineering July 2014 ·· 1000-3428(2014)07-0001-06 A TN492 LDPC Turbo PPPP ( 200433) LDPC Turbo 3 3 LTE 1 Gb/s UMTS 672 Mb/s TSMC 65 nm 490 000 m2 540 MHz LDPC Turbo Design of Application Specific Control Processor for LDPC and Turbo Decoder HUANG Rui, YANG Qing-qing, CHENG Jie-qiong, ZHOU Xiao-fangPPPP (State Key Laboratory of Application Specific Integrated Circuit System, Fudan University, Shanghai 200433, China) AbstractThere are a lot of calculations and data transmitting in the flexible Low Density Parity Check(LDPC) code and Turbo channel decoder. In order to meet the high throughput requirement, the decoder becomes more and more complicated. To solve this problem, an Application Specific Control Processor(ASCP) is proposed which pre-calculates the encoded data and controls the work of the whole decoder system. This high output decoder has three requirements for the control processor: high clock frequency, massive specific calculations and massive data transmitting. By designing the processor’s pipeline, application specific instruction sets, accelerators and memory structure, the decoder can run at a high paralleled status. As a result, the decoder can meet the high throughput requirement of LTE standard 1 Gb/s and UMTS standard 672 Mb/s. The placement and routing result is 490 000 m2 with clock frequency 540 MHz using TSMC 65 nm low power lib and backend layout wiring. Key wordsApplication Specific Control Processor(ASCP); decoder; pipe