vlsi architecture for 8-point ai-based arai dct having low area-time complexity and power at improved accuracyvlsi架构8u201c基于ai arai dct在时间复杂度低,在提高精度.pdfVIP

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vlsi architecture for 8-point ai-based arai dct having low area-time complexity and power at improved accuracyvlsi架构8u201c基于ai arai dct在时间复杂度低,在提高精度.pdf

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vlsi architecture for 8-point ai-based arai dct having low area-time complexity and power at improved accuracyvlsi架构8u201c基于ai arai dct在时间复杂度低,在提高精度

J. Low Power Electron. Appl. 2012, 2, 127-142; doi:10.3390/jlpea2020127 OPEN ACCESS Journal of Low Power Electronics and Applications ISSN 2079-9268 /journal/jlpea Article VLSI Architecture for 8-Point AI-based Arai DCT having Low Area-Time Complexity and Power at Improved Accuracy Amila Edirisuriya 1, Arjuna Madanayake 1,2,*, Vassil S. Dimitrov 2 , Renato J. Cintra 3 and Jithra Adikari 4 1 Department of Electrical and Computer Engineering, University of Akron, Akron, OH 44325, USA; E-Mail: aee12@ 2 Department of Electrical and Computer Engineering, University of Calgary, Calgary, AB T2N 1N4, Canada; E-Mail: dimitrov@asgard.vlsi.enel.ucalgary.ca 3 Department of Statistics, Federal University of Pernambuco, Recife, PE 50740-540, Brazil; E-Mail: rjdsc@ 4 Department of Electrical and Computer Engineering, University of Waterloo, ON N2L 3G1, Canada; E-Mail: jithra.adikari@ * Author to whom correspondence should be addressed; E-Mail: arjuna@; Tel.: +1-330-972-8461. Received: 31 December 2011; in revised form: 22 March 2012 / Accepted: 26 March 2012 / Published: 29 March 2012 Abstract: A low complexity digital VLSI architecture for the computation of an algebraic integer (AI) based 8-point Arai DCT algorithm is proposed. AI encoding schemes for exact representation of the Arai DCT transform based on a particularly sparse 2-D AI representation is reviewed, leading to