VHDL大学设计.docVIP

本科毕业 学院名称 工程学院 专业名称 电子信息工程 论文提交日期 2012年5月 14 日 论文答辩日期 2012年5月 19 日 摘 要 常用的实时数字信号处理的器件有可编程的数字信号处理(DSP)芯片(如AD系列、TI系列)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)等。 有限长冲击响应（FIR）滤波器，由于FIR系统只有零点、系统稳定，便于实现FFT（快速傅里叶变换）算法、运算速度快、线性相位的特性和设计更为灵活等突出优点而在工程实际中获得广泛应用，属于数字信号处理的基本模块之一。本论文对基于FPGA的FIR数字滤波器实现进行了研究，所做的主要工作如下： 1．FIR数字滤波器的基本理论和FPGA的基本概况，以及FPGA设计流程、设计指导原则和常用的设计指导思想与技巧。 2．FIR数字滤波器的基本理论为依据，使用分布式算法为滤波器的硬件实现算法，并对其进行了详细的讨论。 3．16阶低通线性相位FIR滤波器实例。设计使用VHDL语言通过Quartus II软件进行仿真。 关键词： FIR滤波器 FPGA Quartus II Matlab VHDL The Design of FIR Filter base on VHDL (College of Engineering, South China Agricultural University,Guangzhou 510642, China) Abstract: Common real-time digital signal processing devices have programmable digital signal processing (DSP) chip (such as AD series, TI series), application-specific integrated circuit (ASIC), field programmable gates array (FPGA), etc. Limited long shock response (FIR filter, because FIR system only zero, the system is stable, easy to realize FFT (fast Fourier transform) algorithm, quick speed, linear phase characteristic and design more flexible such prominent advantages and in engineering practice being widely applied digital signal processing, belong to one of the basic modules. This paper based on FPGA realizing the FIR digital filters is studied, the main work done as follows: 1. Introduced the basic theory of FIR digital filters with FPGA, and the basic situation of FPGA design process, the design guiding principle and common design guiding ideology and skill. 2. With the basic theory of FIR digital filters, by using distributed algorithm based on the hardware implementation algorithm for filter, and its are discussed in detail. 3. Design a 17 order low-pass linear phase FIR filter examples. Design uses VHDL language through simulation Quartus II software, and the simulation results and Matlab simulation results are compared and analyzed. Key words：FIR filter FPGA Quartus II Distributed Arithme