2016北京微电子研究生学术论坛-半导体研究所-Nshunguyimfura-Victor-.pptxVIP

An Efficient Layered-ABV Methodology for Vision System on Chip based on Heterogeneous parallel Processors.Nshunguyimfura VictorJie Yang, Liyuan Liu and Nanjian Wu* State Key Lab. for Superlattices and Microstructures,Institute of Semiconductors, Chinese Academy of Sciences.nshuvico01@semi.ac.cnOutlineIntroductionL-ABV MethodologyL-ABV implementation on Vision ChipResultsSummaryIntroductionHigh-speed image and video processingRobot VisionTrack of Moving TargetFace RecognitionPattern extraction Control systemHigh-speed visionIntroduction The design requirements High performance More functionalities Real-time system (1000fps)Parallel processingMulti-ProcessorsHigh speed image sensorReconfigurable unity The verification challenge High complexity Heterogeneity Debugging timeIntroductionCodingSynthesis Verification processVision Chip Verification flowTape outReleaseRuntimeVerification Post-siliconVerification Shipped vision systemSilicon prototypeVision Chip design cycleIntroduction The verification overheads Observabity Controllability Exhaustivity Reusability Scalability Productivity The verification principles Time to market Verification resource Risk management Introduction Verification Techniques Verification approaches Two major directions of research in this field: Formal verification Mathematical reasoning Exhaustive Completeness Applicable on small blocks Gray-box verification Dynamic verification Simulation based No capacity limitations Incompleteness Black-box verificationWhite-box verificationIntroduction Drawbacks Design and Verification dependencies Verification flow Time overheads Stepwise nature of the verification processOutlineIntroductionL-ABV MethodologyL-ABV implementation on Vision ChipResultsSummaryL-ABV MethodologyL- ABV Methodology : Layered Assertion Based Verification MethodologyL- ABV Features : Formal verification + Dynamic verification. Gray-box methodology. Splits verification process into three abstraction layer