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Slide 10 参考阅读
Figure 7.20 Gate-Source or Bulk-Source Voltage (volts) Figure 7.21 * Low –Voltage Bias and Load Circuit Figure 7.22 Figure 7.23 * Simple current mirror with level shifting of the drain of M1 Figure 7.24 Figure 7.25 (a) Voltage-mode bandgap topology. (b) Current-mode bandgap topology. (c) Voltage-current-mode bandgap topology. * Method of generating currents with temperature coefficients equal to that of VBE and VPTAT Figure 7.26 * Figure 7.27 (a)Circuit to generate nonlinear correction term, INL. (b) Illustration of the various currents in (a) * A low-voltage, two-stage op amp having VDD≥VT Figure 7.28 A low-voltage, two-stage op amp having VDD ≥VT * A 1V, two-stage operational amplifier Figure 7.29 A 1V, two-stage operational amplifier * ? FTP: 14 Thank you ! WuXB@Zhejiang University,Confidential Wu Xiaobo Zhao Menglian Analog Mixed Signal Integrated Circuit HIGH PEFORMANCE COMS OP-AMPS Chapter 7 * 7-1 Buffered Op Amps Figure 7.1 Low output resistance CMOS Op Amp suitable for driving resistive and capacitive loads Buffered Op Amp Using MOSFETs * A CMOS Op Amp with low-impedance drive capability Figure 7.2 * Simple shunt negative-feedback buffer Figure 7.3 * Buffered Op Amp Using BJTs Figure 7.4 * Two-stage op amp with a Class A, BJT output buffer stage Figure 7.5 Two-stage opamp with a Class A, BJT output buffer stage * * 7-2 Micropower Op Amps Two-stage Miller Op Amp Operating in Weak Inversion Figure 7.6 * The dependence of iD on vDS can be approximated in the way similar to that of strong inversion region Apart from strong inversion region * -- Push-pull output op amp for operation in weak inversion Figure 7.7 Op amp using cascode output for gain improvement in weak inversion operation Figure 7.8 * * Dynamically biased differential amplifier input stage The disadvantage of the amplifiers described so far is Inability to provide large output current while maintaining micropower consumption. Figure 7.9 Assuming M18 through M21 are equal to M3 and M4, M22,
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