M48Z35Y.70MH1E;M48Z35Y.70MH1F;M48Z35.70PC1;M48Z35Y.70PC1;M48Z35Y.70MH6E;中文规格书,Datasheet资料.pdfVIP

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M48Z35Y.70MH1E;M48Z35Y.70MH1F;M48Z35.70PC1;M48Z35Y.70PC1;M48Z35Y.70MH6E;中文规格书,Datasheet资料.pdf

M48Z35 M48Z35Y 256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE 28 protection 1 ■ WRITE protect voltages: PCDIP28 (VPFD = power-fail deselect voltage) battery CAPHAT™ – M48Z35: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V – M48Z35Y: 4.5 to 5.5 V; SNAPHAT® 4.2 V ≤ VPFD ≤ 4.5 V battery ™ ■ Self-contained battery in the CAPHAT DIP package ■ Packaging includes a 28-lead SOIC and SNAPHAT® top (to be ordered separately) ■ Pin and function compatible with JEDEC standard 32 K x 8 SRAMs 28 ■ SOIC package provides direct connection for a ® 1 SNAPHAT top which contains the battery ■ RoHS compliant SOH28 – Lead-free second level interconn

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