13章模拟比较器模块.pptVIP

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13章模拟比较器模块

13 COMPARATOR MODULE 16F877A的AD转换模块 含2个模拟比较器 输入引脚与RA0~3共用,输出引脚RA4~5 片内可编程参考电压 C2OUT: Comparator 2 Output bit When C2INV = 0: 1 = C2 VIN+ C2 VIN- ;0 = C2 VIN+ C2 VIN- When C2INV = 1: 1 = C2 VIN+ C2 VIN- ;0 = C2 VIN+ C2 VIN- C1OUT: Comparator 1 Output bit When C1INV = 0: 1 = C1 VIN+ C1 VIN- ;0 = C1 VIN+ C1 VIN- When C1INV = 1: 1 = C1 VIN+ C1 VIN- ;0 = C1 VIN+ C1 VIN- C2INV: Comparator 2 Output Inversion bit 1 = C2 output inverted ;0 = C2 output not inverted C1INV: Comparator 1 Output Inversion bit 1 = C1 output inverted ;0 = C1 output not inverted CIS: Comparator Input Switch bit When CM2:CM0 = 110: 1 = C1 VIN- connects to RA3/AN3 C2 VIN- connects to RA2/AN2 0 = C1 VIN- connects to RA0/AN0 C2 VIN- connects to RA1/AN1 CM2:CM0: Comparator Mode bits Comparator Interrupts The comparator interrupt lag is set whenever there is a change in the output value of either comparator. COMPARATOR VOLTAGE REFERENCE MODULE CVREN: Comparator Voltage Reference Enable bit 1 = CVREF circuit powered on 0 = CVREF circuit powered down CVROE: Comparator VREF Output Enable bit 1 = CVREF voltage level is output on RA2/AN2/VREF-/CVREF pin 0 = CVREF voltage level is disconnected from RA2/AN2/VREF-/CVREF pin CVRR: Comparator VREF Range Selection bit 1 = 0 to 0.67 VDD, with VDD /24 step size 0 = 0.25 VDD to 0.75 VDD, with VDD /32 step size CVR3:CVR0: Comparator VREF Value Selection bits 0 ≤ VR3:VR0 ≤ 15 When CVRR = 1: CVREF = (VR3:0/ 24) ? (VDD) When CVRR = 0: CVREF = 1/4 ? (VDD) + (VR3:VR0/ 32) ? (VDD) * PIC单片机原理 CMCON bit6,or bit7 * PIC单片机原理

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