基于动态可重构技术的fpga中seu故障容错方法分析-fault tolerance analysis of seu in fpga based on dynamic reconfigurable technology.docxVIP
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基于动态可重构技术的fpga中seu故障容错方法分析-fault tolerance analysis of seu in fpga based on dynamic reconfigurable technology
AbstractWith the development of microelectronic technology and semiconductor manufacturing process, the sizes of transistors in integrated circuits have been shrinked significantly, making them vulnerable to soft errors accordingly. In nowadays, SRAM-based FPGAs are widely applied in aerospace systems due to their low development cost and power consumption. Unfortunately, numerous high- energy particles in the radiative environment may probably trigger Single Event Upsets (SEUs) among SRAM-based FPGAs, which finally results in system failures. Therefore, the technology of fault tolerance of FPGA needs to be highlighted with enormous attention.This dissertation is devoted to improve the reliability of SRAM-based FPGAs by means of fault tolerance technology. Firstly, the demonstration platform, which uses the Virtex-5 FPGA device as core, is designed and built to verify the feasibility of fault tolerance approach and analyze fault tolerance effects. Secondly, the readback and configuration verification method is used to detect SEU fault, based on the theory of configuration information format, readback command composition principle and configuration data frame addressing modes. Finally, this dissertation employed dynamic full reconfiguration and dynamic partial reconfiguration to repair the SEU faults in FPGA’s internal configuration memories.Through the experiments that implemented on the proposed demonstration platform, the verification results showed that, with the function of fault position record, the readback and configuration verification fault detection method can detect 100% SEU errors within FPGA’s internal configuration memories. The fault correction method of dynamic reconfiguration can repair all the SEU errors that happen in FPGA’s internal configuration memories. Comparing with the dynamic full reconfiguration, the technology of dynamic partial reconfiguration can reduce the system’s trouble-free operation time and improve failure recovery. With the com
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