华南理工大学-数字逻辑（中文版）20-vhdl_FSM.pptVIP

VHDL Finite State Machines Finite State Machines Any Circuit with Memory Is a Finite State Machine Even computers can be viewed as huge FSMs Design of FSMs Involves Defining states Defining transitions between states Optimization / minimization Above Approach Is Practical for Small FSMs Only Moore FSM Output Is a Function of Present State Only Mealy FSM Output Is a Function of a Present State and Inputs Moore Machine Describe Outputs as Concurrent Statements Depending on State Only Mealy Machine Describe Outputs as Concurrent Statements Depending on State and Inputs Example 1 Moore FSM - Example 1 Moore FSM that Recognizes Sequence 10 Mealy FSM - Example 1 Mealy FSM that Recognizes Sequence 10 Moore Mealy FSMs – Example 1 FSMs in VHDL Finite State Machines Can Be Easily Described With Processes Synthesis Tools Understand FSM Description If Certain Rules Are Followed State transitions should be described in a process sensitive to clock and asynchronous reset signals only Outputs described as concurrent statements outside the process FSM States (1) FSM States (2) Moore FSM - Example 1 Moore FSM that Recognizes Sequence 10 Moore FSM in VHDL Mealy FSM - Example 1 Mealy FSM that Recognizes Sequence 10 Mealy FSM in VHDL Example 2 Moore FSM Moore FSM Mealy FSM State encode State Encoding Problem State Encoding Can Have a Big Influence on Optimality of the FSM Implementation No methods other than checking all possible encodings are known to produce optimal circuit Feasible for small circuits only Using Enumerated Types for States in VHDL Leaves Encoding Problem for Synthesis Tool Types of State Encodings (1) Binary (Sequential) – States Encoded as Consecutive Binary Numbers Small number of used flip-flops Potentially complex transition functions leading to slow implementations One-Hot – Only One Bit Is Active Number of used flip-flops as big as number of states Simple and fast transition functions Preferable coding technique in FPGAs Types of State Encodings (2) Example