基于FPGA的USB接口下载调试器设计.doc

基于FPGA的USB接口下载调试器设计 刘永强 （西安工程大学电子信息学院通信工程，西安 710048） 摘 要 在新型智能手机、移动终端、PDA等便携设备的开发过程中，通过串口进行文件下载的传统方式受到下载速度或设备尺寸等因素的限制，无法满足研发需求,需要一种更具可行性和适用性的替代方案。因此，研究一个具有高速下载编程，且采用USB接口的下载调试器具有广泛的现实意义。 为了实现通过USB接口下载FPGA程序的功能，本设计以CPLD器件和集成了时钟、EEPROM的FT245RL为基础，利用VHDL硬件描述语言编写CPLD内部程序，实现了对FPGA程序的下载及调试功能，再通过FPGA开发板测试成功。最后经过软硬件综合调试证明本文设计的系统是合理可行的。 论文首先简单介绍了系统设计原理及相关使用工具，接着分软硬件两部分对整个系统的设计方案进行了详细描述，然后是系统的调试与分析部分，最后对此次设计进行了总结和展望。 关键词：FPGA，USB，下载调试器，通用串行总线，嵌入式系统Abstract In the new smart phones, mobile terminals, PDA and other portable devices in the development process, through the serial port for file download download speeds by traditional methods or equipment factors such as size restrictions, unable to meet the R D needs, the need for a more feasible and the applicability of alternatives. Thus, a high-speed download programming, and using USB interface to download the debugger with a wide range of practical significance. The CPLD device design and integration of the clock, EEPROM based on the FT245RL. The use of VHDL hardware description language CPLD internal procedures, to achieve the FPGA program to download and debug features, then test the success of FPGA development board. After the final proof of this paper, hardware and software design of an integrated debugging of the system is reasonably practicable. First of this paper is the simple introduction of the system design principle and related tools, then is the detailed description to the overall system design proposal from software and hardware two parts, and then is part of the systematic debugging and analysis, finally is the summary and the forecast to this design. Keywords: fpga, usb, download debugger, universal serial bus, embedded systems 目 录 前 言 1 第1章 基本原理 3 1.1 USB通信协议和JTAG接口 3 1.2 几种方案设计 3 1.2.1 常见设计方案 3 1.2.2 几种方案的区别 4 1.3 系统方案设计 5 1.3.1系统硬件方案设计 5 1.3.2系统软件方案设计 6 1.3.3 FPGA的设计流程 6 1.3.4 系统结构及工作原理 7 1.4 相关器件 8 1.4.1 EPM7064 8 1.4.2 FT245RL 8 1.4.3 AMS1117 8 1.5 相关软件 9 1.5.1 PROTEL DXP 9 1.5.2 Atlera QaurtuⅡ 9 第2章