Operational constellation simulation with on-board processor 与主板上的处理器运行的卫星星座仿真.pptVIP

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Operational constellation simulation with on-board processor 与主板上的处理器运行的卫星星座仿真.ppt

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Operational constellation simulation with on-board processor 与主板上的处理器运行的卫星星座仿真

Operational constellation simulation with on-board processor emulation This presentation describes a hardware and software architecture designed and used by Dataspazio for simulation of LEO/MEO/GEO satellite constellations. Constellation Simulation Features Typical features of single satellite simulation will be necessary also for constellation (real time, high fidelity TM/TC, Flight SW emulation, configurability). The Single Satellite Approach (HW) The Single Satellite Approach (SW) All components run on the high performance Workstation Constellation Simulator HW Architecture HW Architecture Key Features Constellation Simulator SW Architecture SW Architecture Key Features Satellite Models Architecture Satellite Models Details Model Scheduling Master - Slave Kernel Synchronisation Master - Slave Kernel Protocol Data Access Mechanism Data Access Features Master Kernel acts as Simulation Data Server. MMI connects to Master Kernel to set/retrieve data. Master Kernel is able to route the data request to the correct Slave Kernel “by data name”, e.g. Architecture Evolution Large constellations: more satellite simulations can be hosted on the same (multi-processor) workstation/server (e.g. 32 satellites on four eight-processor servers) Hardware platform: we implemented this approach on Alpha-Tru64Unix workstations (for better ESOC emulator performance) and Fast Ethernet LAN. PC based hardware (and other emulators) can also be adopted Inter-satellite communication: it can be implemented into models by using the data access mechanism already available in the Master Kernel for data visualisation or by direct TCP/IP link Conclusions A distributed architecture for constellation simulation has been designed and implemented in Dataspazio Main features: synchronised execution, centralised monitoring and control, high modularity, SMP-1 standard compliance, parallel processing, Flight Software emulation via ESOC ERC-32 emulator Performance: 70% CPU on Alpha @ 833MHz when emulati