基于多相滤波器组及瞬时测频技术的高效宽带研究外文翻译xocwjg9l.docVIP

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基于多相滤波器组及瞬时测频技术的高效宽带研究外文翻译xocwjg9l.doc

基于多相滤波器组及瞬时测频技术的高效宽带研究外文翻译xocwjg9l

西 安 邮 电 大 学 毕 业 设 计(译 文) 论文题目: 基于多相滤波器组及瞬时测频技术的高效 ?????? ? 带宽数字接收机研究 ????????????????? 院 (系): 通信与信息工程学院 专 业: 电子信息科学与技术 班 级: 电科0903班 学生姓名: 李盼 导师姓名: 常虹 职称: 讲师 ??? A COMPARISON OF ANALOG FRONT END ARCHITECTURES FOR DIGITAL RECEIVERS Holly Pekau Student Member, IEEE, University of Calgary TRLabs e-mail:pekau@atips.ca James W. Haslett Fellow, IEEE, University of Calgary TRLabs e-mail: haslett@enel.ucalgary.ca Abstract Radio receivers that perform analog to digital conversion closerto the antenna and do most of the signal processing in the digital domain are known as digital receivers. Digital receivers aredesirable because they can be more easilyre-con?gured for multista- dard operation, they can facilitate performance improvementsby using digital ?lters for signal processing, and they can potentia- lly realize savings in chip area, power consumption and cost. The de?nition of a digital receiver is general and there are several types of receiver architectures that fall into this category. Digitalreceiver architectures which have been proposed include direct RFNyquist sampling, RF bandpass sampling or sub-sampling, directIF Nyquist sampling, and IF bandpass sampling orsubsamp- ling.This paper compares these digital receiver architectures in various categories including susceptibility to aperture jitter and aperturedistortion, noise ?gure degradation due to aliasing, ease of anti-aliasing ?lter implementation, ease of ADC implemen- tation, linearity, power consumption, chip area, and re-con?gurability. System and circuit level simulations using a commercial RF simulator are performed to quantitatively compare the different digital receiver architectures in some of the aforementioned categories. Thefeasibility of using the proposed digital receiver architectures forvarious standards is then examined and a survey of published

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