二维加速引擎逻辑的EDA验证-集成电路工程专业论文.docxVIP

摘要 摘要 监控芯片中的“二维加速引擎”（TDE:two dimension engine）逻辑主要实现 抗闪烁、缩放和旋转的功能，根据不同的应用场景，作一些功能性验证，并且还 有功能切换的功能测试。 VMM 验证方法学能够给验证提供一些“基类”和一套比较固定有效的验证 架构，这样就有助于提高验证效率并减少验证时间，同时 VMM 定义了一些验证 的标准，从而能最大化复用验证环境与验证组件。System C 语言是一种可靠的高 级编程语言，一种可以与开发流程的步骤相融合的语言。基于以上两点，在搭建 验证环境时才能更高效简单，准确实用。 本论文主要介绍了验证的一些概念以及验证的重要性和独立性，然后讨论了 System C 语言和 VMM 验证方法学以及基于它们搭建的自动化验证平台，还简要 介绍了“二维加速引擎”逻辑的基本原理和逻辑架构等，然后对“二维加速引擎” 逻辑进行了 EDA（electronic design automation）验证。最终实现了一个代码行覆 盖率达到 92%并且表达式覆盖率达到 99%的 EDA 验证平台，而且激励产生机制 是以直接测试为辅，随机测试为主的。在这整个验证的过程当中解决了测试点分 解、测试用例的编写、通用测试用例模板的调试和编写、代码覆盖率的分析和处 理等问题，在此基础上建立起了一套高效而且简洁的验证架构。 关键词：System C 验证 VMM 测试点 覆盖率 Abstract Abstract “Two Dimension Engine”Logic in montor chip is a kind of digital logic circuit which is used to implement the function of de-flicker zme and rotate. According to the application in swich fabric chip, this paper mainly tests the basic functions as well as the switch functions. VMM(verification methodology manual for SystemVerilog) supplies some “basic objects” and an effective verification environment templet, so that it will improve verification efficiency and reduce verification time obviously. It defines some standards which can make creating reuse testbench and modules. System C is an Object Oriented, advanced language which can keep the same step with the chip develop flow.Above all it will make designing the testbench easy and effective, proper and practical. This paper introduces what is verification and the importance and independence of verification and then discusses how to use VMM and System C to design an automatic verification environment that is used to test the “Two Dimension Engine” logic. In the end an EDA(Electronic Design Automation) verification is realized, which is mainly to do random test, the direct test is only assistant way, and make sure the code coverage is 92%, the condition coverage is above 99%. During the verification, many difficult problems are solved, such as the disintegration of test point, the writing of t