Magnetically Isolated Gate Driver With Leakage Inductance Immunity外文.pdf

Magnetically Isolated Gate Driver With Leakage Inductance Immunity外文.pdf

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 1567 Letters Magnetically Isolated Gate Driver With Leakage Inductance Immunity Khairul Safuan Muhammad and Dylan Dah-Chuan Lu Abstract—This letter presents the design of a magnetically iso- lated gate driver with high immunity to leakage inductance. The proposed gate driver (PGD) is developed based on a bipolar totem- pole gate driver (noninverting) located on the secondary side of the coupling transformer. It is able to drive a MOSFET/IGBT from standard CMOS to TTL output and down to LSTTL level. It also achieves large duty cycle ratio and small input to output delay and provides reliable isolation. In this letter, the PGD is analyzed and verified experimentally. The design guidelines are also provided including design considerations. Index Terms—Bipolar totem-pole, coupled inductor, isolated gate driver, leakage inductance immunity, low-power Schottky transistor–transistor logic (LSTTL). Fig. 1. Proposed gate driver in [6]. and the average volt-second of the transformer must be zero to I. INTRODUCTION avoid core saturation. The conventional gate driver as in [1]–[4] HE demand for an efficient and reliable gate driver for provides a simple solution with large duty cycle ratio, how- Tpower switches grows every year. It is concomitant with ever, it requires a bipolar input signal. In [5], the authors solved the development of various characteristics and specifications the

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