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Improvement of Power Supply Rejection Ratio
of LDO Deteriorated
By Reducing Power Consumption
Socheat HENG and Cong-Kha PHAM
Department of Electronic Engineering,
The University of Electro-Communications
Tokyo, JAPAN
Email: socheat@vlsilab.ee.uec.ac.jp; pham@ee.uec.ac.jp
Abstract— In this work, the bulk-gate controlled circuit to
improve the power supply ripple ratio (PSRR) of a Low Dropout
Regulator (LDO) which deteriorates due to lowering power
consumption is proposed. Designing with 0.25μm CMOS process,
the simulation results by HSPICE shown that the proposed
circuit provides a high performance of PSRR even though 1/10 of
the power consumption is reduced compare to the conventional
circuit. It is confirmed that about 40[dB] at 10[Hz] frequency
and 20[dB] at 1[kHz] frequency of PSRR are together improved.
I. INTRODUCTION
When the operation voltage of electronic devices is supplied
by a DC-DC converter, it is impossible to avoid the ripple
noise voltage comes along the power supply line. For the
communications devices such as mobile phones which have
Fig. 1. Basic Low Dropout Regulator Circuit.
the transmission and reception circuit which operates at a high
frequency, the ripple noise of the power supply line has a
bad influence on the stability of the transmission frequency.
The instability of the transmission frequency will result in (PSRR) can be determined by three regions of frequ
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