高速低压差分信号传输接收电路设计微电子学与固体电子学专业论文.docxVIP

哈尔滨工业大学工学硕士学位论文 哈尔滨工业大学工学硕士学位论文 Abstract With the development of HYPERLINK /dict_result.aspx?searchword=%e4%bf%a1%e6%81%af%e5%8c%96amp;tjType=sentenceamp;styleamp;t=information%2Btechnology information technology, the social demand of data transmission grows increasingly. So, we need a new interface technique to realize more fast data transmission, with low noise and low power dissipation meanwhile. LVDS (Low Voltage Differential Signa ling) is an international general interface standard, applied for HYPERLINK /dict_result.aspx?searchword=%e9%ab%98%e9%80%9f%e4%bf%a1%e5%8f%b7%e4%bc%a0%e8%be%93amp;tjType=sentenceamp;styleamp;t=high-speed%2Bsignal%2Btransmission high-speed signal transmission, which uses low voltage swing high- speed differential signal to transmit data. LVDS has many adva ntages such as high- speed, low power dissipation, low noise and low cost. At present, Technology of Low Voltage Differential Signaling receivers have become a research focus in high- speed interface chip field. Based on the research of high- speed signal HYPERLINK /dict_result.aspx?searchword=%e4%bc%a0%e8%be%93%e7%90%86%e8%ae%baamp;tjType=sentenceamp;styleamp;t=transmitting%2Btheory transmitting theoryand equalizer technology, this paper make a deep analysis of LVDS receiving circuit, and make a design using the SMIC standard 0.18μm CMOS technology. The LVDS receiving circuit is composed by pre-amplifier, adaptive equalizer , voltage comparator and fail- safe circuit. Pre-amplifier used the structure of folded cascade op amplifier, it can restrain input common modemode range effective; the adaptive equalizer is the research emphasis of this paper. Based on the deep research of equalizer technology, this paper presents a design of an adaptive equalizer applied for receiving circuit, which provides a high frequency adcance controlled port to equalizer using the feedback signal out of a adaptive loop, to compensate for the distortion of high frequency component during HYPE