基于UVM的AMBA协议转换桥验证实现-软件工程专业论文.docxVIP

摘要 本文主要介绍基于 UVM 高级验证方法结合实际项目在搭建可重用的 SOC 验 证平台中的应用。随着深亚微米半导体工艺的发展，以及集成电路设计能力的快 速提高，集成电路的规模越来越大，功能也越来越强大，SOC 的设计方法已经成 为集成电路设计的一种趋势。SOC 验证的复杂度和工作量也相应不断增大。采用 传统集成电路验证技术搭建 SOC 设计的验证平台需要花费大量的时间，因此，本 文提出了基于 UVM 的验证方法学解决此难题。本文介绍的 UVM 验证方法学，全 称为 Universal Verification Methodology，它互补了许多可重用验证方法，具有全行 业支持的标准化的验证方法。 本文主要结合作者在项目中的实例，AMBA 协议转换桥 SoC 验证，详述采用 UVM 验证方法学快速搭建灵活、可重用的验证平台。UVM 通过抽象事务级建模 来实现验证平台的快速搭建。先将信号打包，创建验证组件、连接验证组件，并 添加仿真验证阶段方法，最后实现整个验证平台的功能。此方法搭建的验证台周 期短、可重用、特别适用于 SoC 超大规模集成电路验证。作者经过 VCS 仿真并分 析覆盖率结果，证明了采用 UVM 高级验证方法搭建验证平台，的确可大大缩短验 证周期、提高 TestBench 的灵活性和可重用性，节约了时间和和人力、降低了 SoC 验证的成本。 关键词： SOC 验证 UVM AMBA 协议转换桥 RTL VCS   Abstract An advanced verification methodology called UVM with the the practical project will be introduced in this paper .These days, with the high speed of the development of technology of semiconductor. The ability of designing a integrated circuit has been improved rapidly. So the scale of the integrated circuit become more and more and more larger and much powerful than ever before.Therefore, it is that SOC design Methodology has become a trend of development to integrated circuited .So the workload of Verification for SoC design has been getting more harder and complicated and the traditional Verification methodology can not meet SOC design because it is much more complex than the traditional integrated circuite design.Thus, UVM is proposed in this paper to solve this issue.The full name of UVM is Universal Verification Methodology that complemented with many reusable verification method,. In this paper, author adopt UVM combined with practical examples in the project to explain that UVM can be used to build TestBench more flexible more reused.UVM can modeling under transaction ;evel by signal packaging,build UVC (Universal Verification Component)follow the dut features.and connect all the UVC together and the SoC Verification testench has been built.Finally, author run simulation by VCS tools to analysis the coverage database and the waveform