基于0.18μmcmos工艺的8位超高速采样保持电路设计-微电子学与固体电子学专业论文.docxVIP

摘要摘要 摘要 摘要 近年来，随着数字通信技术的不断发展，各种高速数字通信系统对模拟数字 转换器(ADC)的性能，特别是速度上的要求越来越高，这也成为了ADC的发展 趋势之一。 采样保持电路作为许多模拟电路和混合信号集成电路中的关键单元电路之 一，广泛应用于模数转换器、CMOS开关电容滤波器、积分器等电路中。在模数 转换器中，采样保持电路作为整个信号处理链中的第一个模块，采样保持电路的 性能直接决定了整个模数转换器的性能。因此，设计一个高速、高精度的采样保 持电路就显得尤为重要。 本文主要工作是设计一个基于0．1 8pro CMOS工艺的8位超高速采样保持电路。 本文首先简单概述了模数转换器的发展、性能指标以及几种高速ADC的结构特点 和工作原理。然后分析了采样保持电路的基本结构和工作原理，着重分析了采样 开关和各种非理性因素对电路的影响。在此基础上，设计了一个开环结构的采样 保持电路，并运用Cadence Spectre软件对电路进行了性能分析和仿真。结果表明， 电路达到了设计要求，具备良好的性能指标。最后利用SMIC 0．18pro 1P6M的 CMOS工艺，采用Cadence系统软件提供的vmuoso Layout软件进行了版图设计。 关键词：模拟数字转换器O心C) 采样保持电路 采样开关 CMOS ABSTRA(玎Abstract ABSTRA(玎 Abstract In re．cent years，谢t11 the continuing development of di百tal communication technology,all kinds of high-speed di百tal communication systenm have hi：gh demands upon Analog-to—Digital Converter(ADC)，spocially the speed,which has become the trend of the development of the ADC． The Track·-and．．Hold circuit,which is one of the key components of many analog and Mixed-signal IC circuits，is widely used in ADC，CMOS switch-capacitor filter, integrator and SO on．In the ADC，勰the first module in the whole signal processing chain，the Track-and—Hold circuit directly determines the performance of the entire ADC． Therefore，design a high-speed,high-precision Track-and—Hold circuit，which seems particularly important． The work of this thesis is the design of 8-Bit ultraspeed Track—·and··Hold circuit based on 0．1 8Inn CMOS process．Firstly,the thesis describes the development of ADC， performance，as well笛several high—speed ADC’S architecture and working principle． Then,analyzes the basic architecture and working principle of Track·-and·-Hold circuit, focuses on the sampling switch and the impact on the circuit that is caused by all kinds of nonideal factors．Under the guidance of the theory mentioned，designs a Track-and-Hold circuit of open-loop arekiteca鹏，then analyzes the performance and simulates the circuit using the Cadence Spectre soRware．The results show that the circuit meets the design requi