基于fpga的64位cpu验证平台的建立-微电子学与固体电子学专业论文.docxVIP

摘要摘要 摘要 摘要 现代Ic设计中，随着设计规模的扩大和复杂度的增长，验证成为最严唆的 挑战之一。在现代ASIC设计中，很难用单一的验证方法来对复杂芯片进行有 效的验证，为了将设计错误减少到可接受的最小量，需要将一系列的验证方法 和工具结合起来。 在64位全定制嵌入式CPU设计过程中，使用了多种验证技术和方法，并 将FPGA验证作为ASIC验证的重要补充，加强了设计正确的可靠性。 论文首先介绍了64位CPU的结构，结合选用的Xilinx的VirtexTM-4系列 Xc4ⅥⅨ60器件，制定了FPGA验证策略。根据64位CPU设计的特点，分析 和研究了FPGA验证平台建立中所遇到的问题：RTL代码的分割和转换，FPGA 实现中的问题和最后的调试。通过选取合适的器件和工具，根据所定制的验证 策略实现了基于FPGA的64位CPU验证环境，并利用所建立的验证环境对CPU 进行验证，包括用ChipScopc进行信号追踪、基于串口的调试机制及用Ped实 现验证的自动化处理。 最后对目前论文工作进行了总结，得出了一些FPGA验证工作的初步认识。 并提出了下一步工作的方向。 关键词：IC设计，64位CPU，验证，FPGA，调试 AbstractABSTRACT Abstract ABSTRACT The major challenge the IC design is confronted with has been to design with far more complex functionality and domain diversity．At the very top of the challenges to be solved is verification．In modem ASIC design，a single verification method or technique could not be used to solve the problem．Instead，a complex sequence of tools and techniques are needed to reduce the number of design errors to an acceptable minimum． In the 64-bit embedded CPU development,we USe a variety of verification methods to eUSUfc the CPU meets the functional requirements．FPGA(neld programmable gate arrays)verification has been one of the most important supplement strategies． The paper describes the structure of the 64-bit CPU and makes the FPGA strategy on the FPGA we chose·XC4VLX60．Then the paper analysis and study the problem occilr during the FPGA verification establishment process，mainly about the RTL partition and conversion，the implement 011 FPGA and the debug problem． Based on the former study,we establish the FPGA verification for the 64-bit CPU and develop kinds of useful debug methods to debug including ChipScope，UART and Pcrl。 At last in conclusion and expectation,this paper concludes some knowledge that is useful for FPGA verification work．And it gives some proposal about future job by listing some fields that should be researched． Key Words：IC design,64-bit CPU，verification，FPGA debug Ⅱ 学位论文版权使用授权书本人完全了解同济大学关于收集、保存、使用学位论文的规定， 学位论文版权使用授权书 本人