c波段低相位噪声跳频源的研制电路与系统专业论文.docxVIP

ABSTRA(XABSTRACT ABSTRA(X ABSTRACT Today,as the electronic technology is developing fantasficly fast,the request for higher performance of synthesizers is put forward，especially the low phase noise performsnce．As the薹LL is the main force of modern synthesizer,do a forwad research in technology of low phase noise design is very necessary．For this reason,the paper is mainly focus on the theory and technology of low phase noise PLL design． This article introduces a scheme which makes C-band lOW phase noise hopping frequency synthesizer come true,with PLL and mixer．Some innovative ideas of low phase noise design about PLL is presented in this paper． At first,the developing history and actuality of the frequency synthesis technology is reviewed。and，Pn frequency synthesis basic technology is introduced．Following,the phase noise and spurs of caculating modd is deduced and frequency synthesizer models in c《}IRtnon use is aslo particularly introdued．Based on the phase noise caculating model the close-to—carrier phase noise math expression of dual-loop PU synthesizer is obtained．Finally,the keys of engineering-oriented realization of such modules as loop filters，dual—VCO and froquency detectors ale discussed．some questions which must be paid much attention in the system design,and a innovative PFD lock detector circuit is presented in this paper． At last,a C-band low phase noise and low spurs PLL designs ale to be presented by me to verify the theroies of low phase noise and low spurs design．All in a word，this article provide some meaningfull instruction for low phase noise and low noise hopping 萤嘲疆鼹cy Pn design。 Key words：phase noise，Supr Redu砸on，hopping frequency synthesizer PFD lock detector circuit,C-band n 独创性声明本人声明所呈交的学位论文是本人在导师指导下进行的研究工 独创性声明 本人声明所呈交的学位论文是本人在导师指导下进行的研究工 作及取得的研究成果。据我所知，除了文中特别加以标注和致谢的地 方外，论文中不包含其他人已经发表或撰写过的研究成果，也不包含 为获得电子科技大学或其它教育机构的学位或证书而使用过的材料。 与我～同工作的同志对本研究所做的任何贡献均已在论文中作了明 确的说嗟并表示谢意。 签名： 豳靴移5影嚣 关于论文使用授权的说明 本学位论文作者完全了解电子科技大学有关保留、使用学位论文 的规定，有权保留并向国家有关部门