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TEST SYSTEM DESIGN FOR POWER CHIP BASED ON ATE AND PERFORMANCE ANALYSIS
Abstract
With the rapid development in recent years, electronics and information technology, power technology also will be toward the high-speed and high-frequency direction of continuous development. Therefore, PM(power management)technology has been widely used in many fields of information technology in the industry. With the continuous improvement of the frequency, which gives accurate test how their dynamic parameters and static parameters of unprecedented challenges. As we all know, all the commercial chips are ultimately dependent on the ATE (Automatic Test Equipment) test equipment for mass production. However, due to various types of ATE test system performance significantly lagged behind the rapid development of PM product performance, and therefore, higher levels of integration, higher precision, lower power consumption and power management chip may face can not be based on the existing ATE test platform production test questions, or face equipped with ultra-high-performance analog modules installed ATE less expensive test questions.
To simplify the testing process design and save testing costs , the issue as an ADIs power management chip ADP2381 for example, ATE test system design and performance analysis solution set of easy operation. The chip can operate at 4.5V ~ 20V input voltage can be provided to 6A output current. 90% of the output voltage can be input voltages from 0.6 V adjusted. And ADP2381 switching frequency is selectable between 250kHz ~ 1.4 MHz. This article first ADP2381 design and test development at home and abroad in a brief introduction, followed by the relevant test of its theories were tested individually exposition given ADP2381 major static and dynamic parameters, and power management several important internal chip modules were introduced, including a control unit, different types of voltage source, over-voltage, over-current and over-temperature protection
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