基于DA算法的FIR数字滤波器设计及其FPGA实现-物理电子学专业论文.docxVIP

II II Abstract As a basic function unit of digital signal processing, finite impulse response (FIR) digital filter has advantages of stability, linear-phase, arbitrary amplitude, design flexibility. It has been widely used in many fields such as communication, radar, image processing and speech processing. Distribution algorithm, which is suitable for the internal structure of FPGA, has been used to implement FIR filter. This method can meet the engineering requirements of high-speed real-time character, and save hardware resources consumption. The design of the linear phase FIR filters based on distributed algorithm implementation on FPGA is studied in this paper. A new method is presented. The main works are carried out as follows: The high order FIR filter is divided into some lower order sub-filters by using polyphase decomposition structure, and the sub-filters are implemented with parallel processing and pipelining to improve processing speed. The sub-filter is implemented with distribution algorithm, but the default of original DA architecture is that its LUT size is too large. To solve this problem, a new method is proposed. This method breaks LUT into smaller ones, and then multiplexers and adders are used to replace LUT. So the hardware scale of the designed FIR filter becomes much smaller. The low-pass FIR digital filters are implemented. The proposed algorithm is compared with the traditional algorithm on both processing speed and hardware scale. These proposed filters have been simulated and synthesized with Quartus II 7.1, implemented in an EP2S60F1020C4 FPGA device. Results show that the proposed method saves resource usage with 8% and its speed arrives 184.5MHZ, has been improved with 15%. It is of certain significance in both theory and engineering for this work to exploit some new approaches for the design and implementation of FIR digital filter with linear phase. Key words: FIR filter; FPGA; DA; polyphase decomposition PAGE PAGE IV 目