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II
II
Abstract
With fast development of the Internet, more severe information security problems have been exposed. To ensure the security, some contents on Internet need to be monitored or resumed in some situations, and the application-level protocol for packets can be identified exactly. These lead to higher requirements for development of IC (Integrated Circuits) design in network monitoring devices. As an important part of IC development, highly-effective verification platform is required. This thesis mainly focuses on how to build an effective verification platform facing application-level protocol.
Firstly, the thesis introduces integrated circuits’ front-end verification methods, and traditional verification methods for network system development are followed. Some weak points are exposed when facing application-level protocol for these methods. Aiming to these a highly-effective verification platform scheme is proposed, some key technologies are involved, mainly including the reusability of verification module, the generation of application-level sessions, and the organization of stimulus. The platform uses SystemC to model all the modules of platform for its object-oriented inheritance characteristic. With such structure, it is reusable in similar project. Furthermore, the platform uses extends TCL command to generate stimulus data, configuration data and control data, and uses a Perl script to update the verification report automatically.
Finally, the thesis introduces the verification statistics in realistic project and analyses the result. The verification platform is designed and applied to verify digital integrated circuits successfully. The result of this case proves this platform’s feasibility, affectivity, reusability and automation.
Key Words: Application-level Protocol, Front-end Verification, Verification Platform, SystemC, Reusability, Automation
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III
目 录
摘 要 I
Abstract II
英文缩略语 V
1 绪 论
1.1 选题背景与课题意义(1)
1.2 课题来源(3)
1.3
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